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MCR100 Series Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors PNPN devices designed for high volume, line-powered consumer applications such as relay and lamp drivers, small motor controls, gate drivers for larger thyristors, and sensing and detection circuits. Supplied in an inexpensive plastic TO-226AA package which is readily adaptable for use in automatic insertion equipment. * Sensitive Gate Allows Triggering by Microcontrollers and Other Logic Circuits * Blocking Voltage to 600 Volts * On-State Current Rating of 0.8 Amperes RMS at 80C * High Surge Current Capability -- 10 Amperes * Minimum and Maximum Values of IGT, VGT and IH Specified for Ease of Design * Immunity to dV/dt -- 20 V/sec Minimum at 110C * Glass-Passivated Surface for Reliability and Uniformity * Device Marking: Logo, Device Type, e.g., MCR100-3, Date Code MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Peak Repetitive Off-State Voltage(1) (TJ = to 110C, Sine Wave, 50 to 60 Hz; Gate Open) MCR100-3 MCR100-4 MCR100-6 MCR100-8 Symbol VDRM, VRRM Value Unit Volts 100 200 400 600 0.8 10 Amp Amps 3 Preferred Device http://onsemi.com SCRs 0.8 AMPERES RMS 100 thru 600 VOLTS G A K *40 2 1 On-State RMS Current (TC = 80C) 180 Conduction Angles Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave, 60 Hz, TJ = 25C) Circuit Fusing Consideration (t = 8.3 ms) Forward Peak Gate Power (TA = 25C, Pulse Width IT(RMS) ITSM TO-92 (TO-226AA) CASE 029 STYLE 10 PIN ASSIGNMENT I2t PGM PG(AV) IGM VGRM TJ Tstg 0.415 0.1 0.10 1.0 5.0 -40 to 110 -40 to 150 A2s Watt Watt Amp Volts C C 1 2 3 Cathode Gate Anode v 1.0 s) v v Forward Average Gate Power (TA = 25C, t = 8.3 ms) Forward Peak Gate Current (TA = 25C, Pulse Width 1.0 s) Reverse Peak Gate Voltage (TA = 25C, Pulse Width 1.0 s) Operating Junction Temperature Range @ Rate VRRM and VDRM Storage Temperature Range ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Preferred devices are recommended choices for future use and best overall value. (1) VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. (c) Semiconductor Components Industries, LLC, 1999 1 March, 2000 - Rev. 2 Publication Order Number: MCR100/D MCR100 Series THERMAL CHARACTERISTICS Characteristic Thermal Resistance -- Junction to Case -- Junction to Ambient Lead Solder Temperature (t1/16 from case, 10 secs max) Symbol RJC RJA TL Max 75 200 260 Unit C/W C ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current(1) (VD = Rated VDRM and VRRM; RGK = 1 k) TC = 25C TC = 110C IDRM, IRRM -- -- -- -- 10 100 A ON CHARACTERISTICS Peak Forward On-State Voltage(*) (ITM = 1.0 Amp Peak @ TA = 25C) Gate Trigger Current (Continuous dc)(2) (VAK = 7.0 Vdc, RL = 100 Ohms) Holding Current (2) (VAK = 7.0 Vdc, Initiating Current = 20 mA) Latch Current (VAK = 7.0 V, Ig = 200 A) Gate Trigger Voltage (Continuous dc)(2) (VAK = 7.0 Vdc, RL = 100 Ohms) TC = -40C VTM TC = 25C TC = 25C TC = -40C TC = 25C TC = -40C TC = 25C IGT IH IL VGT -- -- -- -- -- -- -- -- -- 40 0.5 -- 0.6 -- 0.62 -- 1.7 200 5.0 10 10 15 0.8 1.2 Volts A mA mA Volts DYNAMIC CHARACTERISTICS Critical Rate of Rise of Off-State Voltage (VD = Rated VDRM, Exponential Waveform, RGK = 1000 Ohms, TJ = 110C) Critical Rate of Rise of On-State Current (IPK = 20 A; Pw = 10 sec; diG/dt = 1 A/sec, Igt = 20 mA) *Indicates Pulse Test: Pulse Width 1.0 ms, Duty Cycle 1%. (1) RGK = 1000 Ohms included in measurement. (2) Does not include RGK in measurement. dV/dt 20 35 -- V/s di/dt -- -- 50 A/s http://onsemi.com 2 MCR100 Series Voltage Current Characteristic of SCR + Current Anode + VTM on state IRRM at VRRM IH Symbol VDRM IDRM VRRM IRRM VTM IH Parameter Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak on State Voltage Holding Current Reverse Blocking Region (off state) Reverse Avalanche Region Anode - + Voltage IDRM at VDRM Forward Blocking Region (off state) 100 GATE TRIGGER VOLTAGE (VOLTS) 95 90 GATE TRIGGER CURRENT ( m A) 80 70 60 50 40 30 20 10 -40 -25 -10 5 20 35 50 65 80 TJ, JUNCTION TEMPERATURE (C) 110 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 -40 -25 -10 5 20 35 50 65 80 TJ, JUNCTION TEMPERATURE (C) 95 110 Figure 1. Typical Gate Trigger Current versus Junction Temperature Figure 2. Typical Gate Trigger Voltage versus Junction Temperature http://onsemi.com 3 MCR100 Series 1000 1000 100 LATCHING CURRENT ( m A) 95 110 HOLDING CURRENT (m A) 100 10 -40 -25 -10 5 20 35 50 65 80 TJ, JUNCTION TEMPERATURE (C) 10 -40 -25 -10 5 20 35 50 65 80 TJ, JUNCTION TEMPERATURE (C) 95 110 Figure 3. Typical Holding Current versus Junction Temperature Figure 4. Typical Latching Current versus Junction Temperature TC, MAXIMUM ALLOWABLE CASE TEMPERATURE ( C) I T, INSTANTANEOUS ON-STATE CURRENT (AMPS) 120 110 100 90 DC 80 70 60 50 40 0 0.1 30 60 90 120 0.5 180 10 MAXIMUM @ TJ = 25C MAXIMUM @ TJ = 110C 1 0.2 0.3 0.4 IT(RMS), RMS ON-STATE CURRENT (AMPS) 0.1 0.5 0.8 1.1 1.4 1.7 2.0 2.3 2.6 2.9 3.2 3.5 VT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) Figure 5. Typical RMS Current Derating Figure 6. Typical On-State Characteristics http://onsemi.com 4 MCR100 Series TO-92 EIA RADIAL TAPE IN FAN FOLD BOX OR ON REEL H2A H2A H2B H2B H W2 H4 H5 L1 L F1 F2 P2 P1 P P2 D H1 W1 W T T2 T1 Figure 7. Device Positioning on Tape Specification Inches Symbol D D2 F1, F2 H H1 H2A H2B H4 H5 L L1 P P1 P2 T T1 T2 W W1 W2 Millimeter Max Min 3.8 0.38 2.4 1.5 8.5 0 0 18 15.5 8.5 2.5 12.5 5.95 3.55 0.15 -- 0.35 17.5 5.5 .15 Item Tape Feedhole Diameter Component Lead Thickness Dimension Component Lead Pitch Bottom of Component to Seating Plane Feedhole Location Deflection Left or Right Deflection Front or Rear Feedhole to Bottom of Component Feedhole to Seating Plane Defective Unit Clipped Dimension Lead Wire Enclosure Feedhole Pitch Feedhole Center to Center Lead First Lead Spacing Dimension Adhesive Tape Thickness Overall Taped Package Thickness Carrier Strip Thickness Carrier Strip Width Adhesive Tape Width Adhesive Tape Position Min 0.1496 0.015 0.0945 .059 0.3346 0 0 0.7086 0.610 0.3346 0.09842 0.4921 0.2342 0.1397 0.06 -- 0.014 0.6889 0.2165 .0059 Max 4.2 0.51 2.8 4.0 9.5 1.0 1.0 19.5 16.5 11 -- 12.9 6.75 3.95 0.20 1.44 0.65 19 6.3 0.5 0.1653 0.020 0.110 .156 0.3741 0.039 0.051 0.768 0.649 0.433 -- 0.5079 0.2658 0.1556 0.08 0.0567 0.027 0.7481 0.2841 0.01968 NOTES: 1. Maximum alignment deviation between leads not to be greater than 0.2 mm. 2. Defective components shall be clipped from the carrier tape such that the remaining protrusion (L) does not exceed a maximum of 11 mm. 3. Component lead to tape adhesion must meet the pull test requirements. 4. Maximum non-cumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches. 5. Holddown tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive. 6. No more than 1 consecutive missing component is permitted. 7. A tape trailer and leader, having at least three feed holes is required before the first and after the last component. 8. Splices will not interfere with the sprocket feed holes. http://onsemi.com 5 MCR100 Series ORDERING & SHIPPING INFORMATION: MCR100 Series packaging options, Device Suffix U.S. MCR100-3,4,6,8 MCR100-6RLRA MCR100-6RLRM Europe Equivalent MCR100-3RL,6RL,8RL MCR100-6ZL1 Shipping Bulk in Box (5K/Box) Radial Tape and Reel (2K/Reel) Radial Tape and Fan Fold Box (2K/Box) Description of TO92 Tape Orientation N/A, Bulk Round side of TO92 and adhesive tape visible Flat side of TO92 and adhesive tape visible http://onsemi.com 6 MCR100 Series PACKAGE DIMENSIONS TO-92 (TO-226AA) CASE 029-11 ISSUE AJ A R P L SEATING PLANE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 --- 0.250 --- 0.080 0.105 --- 0.100 0.115 --- 0.135 --- MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 --- 6.35 --- 2.04 2.66 --- 2.54 2.93 --- 3.43 --- K XX G H V 1 D J C SECTION X-X N N DIM A B C D G H J K L N P R V STYLE 10: PIN 1. CATHODE 2. GATE 3. ANODE http://onsemi.com 7 MCR100 Series ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (M-F 1:00pm to 5:00pm Munich Time) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (M-F 1:00pm to 5:00pm Toulouse Time) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (M-F 12:00pm to 5:00pm UK Time) Email: ONlit@hibbertco.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, England, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-8549 Phone: 81-3-5740-2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 MCR100/D |
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